In a previous study, we have argued that the modified structure shows a superior static latch up performance at high operating temperatures. A latchup is a type of short circuit which can occur in an integrated circuit ic. When the same set up is tested on a resistive load no latch up is noticed. Its simple, fast and seems to be a reasonable match to. The series resistance of the gate drive circuit limits this current.
More specifically it is the inadvertent creation of a lowimpedance path between the. Pdf in this paper, effects preceding a latchup fault in insulated gate bipolar transistors igbts are studied as they manifest. Unfortunately, under dynamic conditions when the igbt is switching from on to off, it may latch up at drain current values less than the static current value. Primary failure modes associated with igbt latchup faults are. Insulated gate bipolar transistor igbt basics ixys corporation. Robust design with major power discrete technologies. The mc33153 is specifically designed as an igbt driver for high power applications that include ac induction motor control, brushless dc motor control and uninterruptable power supplies. Latchup of parasitic thyristor in igbt insulated gate. Consider the igbt embedded in a stepdown converter circuit. This application note explains how this occurs and what can be done to prevent it for mosfet drivers. The latch up immunity was evaluated under static and dynamic conditions, as shown in figures 5 and 6 respectively. The latchup does not have to happen between the power rails it can happen at any place where the required parasitic structure exists.
Can someone help us with latching issues when driving igbts. Figure 5 shows that the maximum static saturation current is around 4000acm2 with no latch up occurring. Latch up an igbt is made of four alternate pnpn layers. Pdf dynamic avalanche behavior of power mosfets and. When a customer buys an integrated circuit a gate or an operational. Catastrophic failure and faulttolerant design of igbt. Most cmos ics, given proper conditions, can latch like an scr, creating a short circuit from the positive supply voltage to ground. The dynamic latch up process in conventional and modified lateral insulated gate bipolar transistor ligbt structures is studied in this paper. Scr parasitic structure is formed as a part of the totempole pmos and nmos transistor pair on the output drivers of the gates. An6076 design and application guide of bootstrap circuit for high. A nearly native igbt model would be a worthwhile addition to ltspice.
A possibility for a latchup mitigation is the latchup protection technology circuit. The p substrate and n drift and p body regions form the pnp transistor. The jfet represents the constriction of current between any two neighboring igbt cells. On the other hand, with the increasing cells density and speed of newer technology, dynamic latchup might affect high current applications.
Static latchup happens at high collector currents, which turn on the parasitic npn. Figure 7 shows latchup case that the highside output does not changed by input. The bootstrap circuit is useful in a highvoltage gate driver and operates as. Opencircuit can also be due to absence of gate drive signal. How the igbt insulated gate bipolar transistor latch up. Catastrophic failure and faulttolerant design of igbt power electronic convertersan overview. Thus, although the latchup effect is no longer a problem with modern cmos circuits. Dynamic latchup in advanced ligbt structures at high. Turnoff time as a precursor for gate bipolar transistor latchup. A circuit symbol for the igbt is shown in figure 3. White paper fourthgeneration field stop igbt with high. The individual bipolar devices have low current gain, with a.
Dynamic avalanche behavior of power mosfets and igbts under unclamped inductive switching conditions. Latchup is a failure mode where the igbt can no longer be turned off by the gate. Low driving power and a simple drive circuit due to the input mos gate structure. A latch up is a type of short circuit which can occur in an integrated circuit ic. The first circuit shows an nchannel power mosfet driving a wide. Catastrophic failure and fault9tolerant design of igbt power. When igbt is turned off, the mosfet portion of the device turns off quite rapidly, and the portion of the total device current that it carries goes to zero. The first circuit shows an nchannel power mosfet driving a wide base pnp. In the first faulttolerant motor drive reported by janhs. When a latchup is detected, the lpt circuit shuts down the chip and holds it powereddown for a preset time. More specifically it is the inadvertent creation of a lowimpedance path between the power supply rails of a mosfet circuit. It supports most of the voltage and allows the mosfet to be a low voltage type and consequently have a low rdson value.
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